VSD - Embedded-UVM

Online Course

Udemy
VSD – Embedded-UVM

What is the course about?

VSD – Embedded-UVM
The course VSD – Embedded-UVM is an online class provided by Udemy. It may be possible to receive a verified certification or use the course to prepare for a degree.

Opensource Verification and Emulation

Course description
  • VSD – Embedded-UVM
  • We take a dive into Embedded UVM and its use cases as a platform for Functional Verification and SoC FPGA based Emulation
  • We learn how to code Embedded UVM powered testbench for a hardware accelerator design IP
  • The test bench is then adapted to Cyclone V and Ultrascale Zynq based platforms to demonstrate Embedded UVM powered low-cost SoCFPGA based emulation solutions.
  • Basics of UVM is nice to have
  • Basics of digital design is a must to have
  • Novice knowledge of opensource EDA flow is nice to have
  • 4 hours on-demand video
  • 2 articles
  • 1 downloadable resource
  • Full lifetime access
  • Access on mobile and TV
  • Certificate of Completion
  • Kunal Ghosh

Prerequisites & Facts

VSD – Embedded-UVM

Course Topic

Design, Design Tools, SystemVerilog

University, College, Institution

Udemy

Course Skill Level

Course Language

English

Place of class

Online, self-paced (see curriculum for more information)

Degree

Certificate

Degree & Cost

VSD – Embedded-UVM

To obtain a verified certificate from Udemy you have to finish this course or the latest version of it, if there is a new edition. The class may be free of charge, but there could be some cost to receive a verified certificate or to access the learning materials. The specifics of the course may have been changed, please consult the provider to get the latest quotes and news.
Udemy
VSD – Embedded-UVM
provided by Udemy

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School: Udemy
Topic: Design, Design Tools, SystemVerilog